Cadence Unveils Palladium Z3 and Protium X3 Programs to Usher in a New Period of Accelerated Verification, Software program Improvement and Digital Twins

Cadence Design Programs, Inc. (Nasdaq: CDNS) as we speak introduced the brand new Cadence^® Palladium^® Z3 Emulation and Protium^™ X3 FPGA Prototyping programs, a revolutionary digital twin platform that builds on the success of the industry-leading Palladium Z2 and Protium X2 programs to deal with escalating system and semiconductor design complexity, and to speed up the event timeline for probably the most superior SoCs. Palladium and Protium programs have lengthy been trusted by market-shaping AI, automotive, hyperscale, networking and cellular chip corporations to ship the very best throughput pre-silicon {hardware} debug and pre-silicon software program validation. Focused on the {industry}’s largest multi-billion-gate designs, the brand new Palladium Z3 and Protium X3 programs set a brand new normal of excellence, offering prospects with greater than a 2X improve in capability and a 1.5X efficiency improve in comparison with previous-generation programs, enabling quicker design bring-up and shortening total time to market.

“As generational drivers speed up the necessity for system and semiconductor innovation, our prospects are going through growing challenges to energy probably the most superior purposes,” stated Paul Cunningham, senior vp and normal supervisor of the System Verification Group at Cadence. “The third era Palladium and Protium dynamic duo programs are core parts of the Cadence Verification Suite and seamlessly interface with the Verisium AI-driven Verification Platform. The Cadence verification full circulation gives our prospects the very best verification throughput wanted to ship their {hardware} improvements to market quicker and to help the fast growth of recent applied sciences, similar to generative AI.”

The Palladium Z3 and Protium X3 programs supply elevated capability, and scale from job sizes of 16 million gates as much as 48 billion gates, so the biggest SoCs may be examined as a complete somewhat than simply partial fashions, guaranteeing correct performance and efficiency. The programs are powered by the NVIDIA BlueField DPU and NVIDIA Quantum InfiniBand networking platforms and preserve congruency when transitioning between the 2 programs and transitioning from digital to bodily interfaces and vice versa. The Palladium Z3 system accelerates {hardware} verification, and thru purposeful and interface congruency, fashions may be shortly introduced up onto the Protium X3 system for accelerated software program validation.

“The supercharged Palladium Z3 and Protium X3 are constructed to ship quick pre-silicon verification and validation of the biggest and most complicated gadgets,” stated Dhiraj Goswami, company vp, {Hardware} System Verification R&D at Cadence. “Our modern customized silicon and system structure, mixed with revolutionary modular compile and debug capabilities enabling a number of turns per day, continues to push the envelope to fulfill our prospects’ wants, permitting them to resolve the world’s hardest challenges and allow their subsequent era of improvements to change into a actuality.”

“Constructing environment friendly, high-performance AI platforms requires refined infrastructure and integration throughout a full stack of optimized programs and software program,” stated Scot Schultz, senior director, Networking at NVIDIA. “Accelerated by NVIDIA networking, the next-generation Cadence Palladium and Protium programs push the boundaries of capability and efficiency to assist allow a brand new period of generative AI computing.”

With the Palladium Z3 system’s new domain-specific apps, customers have entry to probably the most full providing for managing growing system and semiconductor design complexity, enhancing system-level accuracy, and accelerating low-power verification. The domain-specific apps embrace the {industry}’s first 4-State Emulation App, the Actual Quantity Modeling App, and the Dynamic Energy Evaluation App.

“As SoCs change into extra complicated, scalable validation and verification instruments that allow large software program testing earlier than tapeout are extra vital than ever,” stated Tran Nguyen, senior director of design companies, Arm. “The newest {hardware} verification platforms and instruments from Cadence are sparking innovation in Arm IP design for AI, automotive, and information heart purposes, and we stay up for how this may profit our mutual prospects.”

“Delivering on management computing merchandise requires AMD to deliver collectively a large number of pre-silicon options and methods to fulfill the dimensions of the verification problem,” stated Alex Starr, Company Fellow, AMD. “Cadence Palladium Z3 and Protium X3 programs add to our capabilities between emulation and enterprise prototyping to enhance design productiveness and meet time-to-market targets. Our collaboration with Cadence additionally incorporates the AMD Versal™ Premium VP1902 adaptive SoC inside the Protium X3 system in addition to AMD EPYC™ processor-based host servers certified for each the Palladium Z3 and Protium X3 programs to allow excessive capability with next-level efficiency and scalability.”

The Palladium Z3 and Protium X3 programs are a part of the broader Cadence Verification Suite and help the corporate’s Clever System Design^™ technique, enabling SoC design excellence. The programs have been deployed at choose prospects, with normal availability anticipated in Q3 2024. For extra info on the brand new Palladium Z3 and Protium X3 programs, please go to www.cadence.com/go/dynamicduo3.